One approach to electronic storage devices has been the use of floating gate memory cells. However, conventional floating gate devices have limitations. One limitation includes the limited potential for continued scaling of the device structure. This is due to the stringent requirements placed on the tunnel oxide layer. There is often a trade off between speed and reliability in a conventional flash gate to allow an acceptable charge transfer rate to and from the floating gate, with satisfactory charge retention. Therefore, in order to overcome the scaling limits of floating gate devices, floating gates incorporating small crystals have been introduced. The use of crystalline components in nonvolatile memory devices allows thinner injection oxides, which permits better endurance, lower operating voltages, and faster write/erase speeds.
A current challenge includes finding improved floating gate and dielectric materials. Another current challenge includes developing improved manufacturing methods that permit higher levels of device scaling, and improve device performance for given material selections. Methods are needed that provide improved properties to overcome these and other challenges. What are also needed are improved memory devices utilizing these structures to take advantage of the improved properties.